BS EN IEC 63093-9:2020 Ferrite cores – Guidelines on dimensions and the limits of surface irregularities Part 9: Planar cores

BS EN IEC 63093-9:2020 pdf free.Ferrite cores – Guidelines on dimensions and the limits of surface irregularities Part 9: Planar cores.
This part of IEC 63093 specifies the shapes and dimensions of ferrite cores for inductive components (transformers and chokes), whose the coil is typically made of multi-layer boards (or the coil is part of the motherboard), and the effective parameter values used in calculations. This document gives guidelines on allowable limits of surface irregularities applicable to planar-cores as well.
This document is considered as a sectional specification useful in the negotiation between ferrite core suppliers and users about surface irregularities.
The general consideration upon which the design of this range of cores is based is given in Annex A.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content constitutes requirements of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies.
IEC 60205:2016, Calculation of the effective parameters of magnetic piece parts
IEC 60401-1, Terms and nomenclature for cores made of magnetically soft ferrites — Part 1:
Terms used for physical irregularities
IEC 60424-1, Ferrite cores — Guidelines on the limits of surface irregularities — Part 1:
General specification
3 Terms and definitions
For the purpose of this document, the terms and definitions given in IEC 60401-1 and
IEC 60424-1 apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp
4 Primary dimensions
4.1 Planar shapes and dimensions
The main shapes and dimensions shall be as given in the following figures and tables.
The main shapes, dimensions, and parameters for EL-cores are given in:
● Figure 1 – Planar EL-core- and mating PLT-core;
● Table 1 – Dimensions of planar EL-core and mating PLT-core;
Table 2 – Effective parameter values and Amin values.
The main shape, dimensions, and parameters for low-profile E-cores are given in:
● Figure 2 – Low-profile E-core and mating PLT-core;
● Table 3 – Dimensions of low-profile E-core and mating PLT-core;
● Table 4 – Effective parameter values and Amin values.
● The main shape, dimensions, and parameters for ER-cores are given in:
● Figure 3 – Low-profile ER-core and mating PLT-core;
● Table 5 – Dimensions of low-profile ER-core and mating PLT-core;
● Table 6 – Effective parameter values and A min values.
A uniform dimensional nomenclature has been chosen in order to facilitate a comparison of major physical attributes among the different core shapes.
4.2 Dimensions and effective parameters of planar EL-core and mating PLT-core For the definitions of effective parameters and their calculations, reference shall be made to IEC 60205.
4.3 Dimensions and effective parameters of low-profile E-core and mating PLT-core
For the definitions of effective parameters and their calculations, reference shall be made to IEC 60205.
5 Limits of surface irregularities
5.1 General Surface irregularities are defined in IEC 60424-1.
5.2 Examples of surface irregularities
Figure 4 shows different examples of surface irregularities for a planar EL-core.
The areas of the chips located on the mating surfaces (Cl and Cl’ irregularities in Figure 7, Figure 8 and Figure 9) shall not exceed the following limits:
— the cumulative area of the chips shall be less than 4 % of the relevant mating surface. The mating surface of each outer leg and centre post is considered separately. The minimum area is taken as 0,5 mm2 to be distinguishable to the naked eye;
— the total length of the ragged edges shall be less than 25 % of the perimeter of the relevant mating surface.
5.3.3 Chips and ragged edges on other surfaces For chips and ragged edges located on the surfaces:
— the allowab’e chipping areas are doubled as compared to the limits for the whole mating surfaces;
— the total length of the ragged edges shall be less than 25 % of the perimeter of the smaller adjoining surface;
— chips and ragged edges are not acceptable on the inner edges of the wire slot area (C2 irregularity in Figure 8 and Figure 9).
Area and length reference for visual inspection are given in Table 7. Reference values of allowable areas of chips are given in Annex B.
5.4 Cracks
Different cracks are shown in Figure 10, Figure 11 and Figure 12. In principle three different types of cracks can be distinguished.
a) Cracks which are parallel to the magnetic flux path (Si, S2. S5, S5’, S5”). These cracks are magnetically not critical. The maximum length of a single crack is 33 % (113) of the dimension of the relevant surface which is parallel to the crack. In the case of multiple cracks the maximum cumulative length doubles.
b) Cracks which are perpendicular to the magnetic flux path (S3. S3’, 53”, S4, S4’). These cracks are magnetically critical. They can reduce the relative cross-section of the magnetic flux or add an additional air gap into the magnetic circuit. The maximum total length of cracks is 20 % (1/5) of the dimension of the relevant surface which is parallel to the crack.
c) Cracks which go from one edge to another edge (S6). These cracks can cause chipping during the operation In the circuit. The loose particles can cause malfunctions in the circuit. Therefore this type of crack is not acceptable in any case.
The reference dimensions are given in Figure 13, Figure 14 and Figure 15.
The limits for cracks are given in Table 8, Table 9 and Table 10.
5.5 Flash
There shall be no flash extending from the core into the wire slot.
5.6 Pull-outs
The pull-outs are applicable only for the inner surface where the PCB is seated (as shown in Figure 10, Figure 11 and Figure 12).
For planar EL-cores, low-profile E-cores and low-profile ER-cores, the cumulative area of pull- outs of the core shall be less than 20 % of the total respective surface area.BS EN IEC 63093-9 pdf download.BS EN IEC 63093-9:2020 Ferrite cores – Guidelines on dimensions and the limits of surface irregularities Part 9: Planar cores